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Digital Audio Delay For Perfect Lip Sync

Do you have a large plasma or LCD TV set and a home-theatre system? If so, you may have problems with sound and picture synchronisation (lip-sync). This Digital Audio Delay unit allows you to get the picture and audio perfectly matched. to choose from. To help you in this choice we gathered a number of these to test along with some expansion boards that might help you connect the Maximite to the rest of the world.

By Nicholas Vinen

Lip sync problems can occur because modern TVs do a lot of video processing before the signal gets to the screen. Some sets (usually 100Hz or 200Hz types) can delay the picture by several hundred milliseconds. If you’re using the TV’s internal speakers, it will delay the sound by an appropriate amount so that they match but if you’re using external speakers for better sound quality, this won’t necessarily be the case.

Synchronisation problems are usually evident if you’re connecting a DVD/Blu-ray player to the TV using a component video or composite video cable (ie, an analog connection) and feeding the sound direct to your home-theatre system. Sound sync problems can also occur with earlier HDMI systems but note that the HDMI 1.3 standard introduced automatic audio synchronisation to solve this problem.

Some DVD/Blu-ray players, home-theatre amplifiers and set-top boxes also have built-in audio delays but they sometimes don’t provide a long enough delay or a fine enough adjustment to get the synchronisation just right. By contrast, this unit provides an adjustable delay from 20-1500ms in 10ms steps. It can handle Dolby Digital (AC3), Digital Theatre System (DTS) and linear PCM audio with a sampling rate of up to 48kHz. That covers most video recording media and broadcasts.

The unit can accept either an S/PDIF or TOSLINK digital audio input and because the delay is done digitally, it won’t affect sound quality. You set the delay once using a universal infrared remote control and it remembers it from then on. The delay can be temporarily “defeated” (switched off) using the remote control when it isn’t required (by pressing the mute button).

It wasn’t possible for us to check it with all available multi-channel audio formats (there are quite a few) but most should work. The main restriction is the data bit rate; our design can handle up to 2.3Mbit/s. For example, we haven’t tried it with Dolby Digital Plus or DTS-ES but they should be within its capabilities (depending on the exact encoding the player uses).

In reality, the upper limit is actually higher than 2.3Mbit/s but note that the unit is not fast enough to handle 96kHz linear PCM (eg, on DVD audio discs) which is over 4Mbits/s.

Operating principle

Digital audio from CD, DVD and Blu-ray players is transmitted using a protocol called S/PDIF, for Sony/Philips Digital Interconnect Format. The optical version, developed by Toshiba, is called TOSLINK (see the accompanying panel for a detailed description of the S/PDIF format).

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Fig.1: block diagram of the Digital Audio Delay. The incoming audio signal comes in either via coax to CON2 (and is then amplified) or is fed in via a fibre optic cable (TOSLINK). S1 selects between the two. IC8 recovers the clock signal and then the data and clock pass to microcontroller IC1. This buffers the audio in external SRAM IC2, with IC3 & IC4 used to select the storage address. The delayed audio is then simultaneously output via a TOSLINK transmitter and buffered RCA coax output (CON3). The crystal oscillator is used by IC1 to generate its instruction clock.

This circuit is partly based on previously published audio projects, the most recent being the SportSync (May 2011). However, that project delayed an audio analog signal by using a micro to digitise it, then delaying the digitised signal and converting it back to analog audio using the micro’s internal digital-to-analog converter. However, we cannot use the same method here because we are delaying a digital audio stream – see Fig.1.

The problem here is that, ideally, we need to delay the raw S/PDIF stream to preserve it in its entirety. But virtually all S/PDIF receiver ICs split the raw data into separate audio and data streams, which appear at pins 12 & 15-18 in the case of the Texas Instruments DIR9001 we are using here. We would need a bigger micro (inevitably a surface-mount type with more pins) in order to reconstitute the S/PDIF stream from these separate data streams.

So we looked for another way. While it is not documented in the data sheet, the DIR9001’s system clock output (SCKO) signal is in phase with the incoming S/PDIF stream. This clock is generated by a voltage controlled oscillator (VCO) which is part of a phase-locked loop (PLL). So we use the system clock output to allow the micro to receive and delay the S/PDIF raw data stream. In fact, we don’t use any of the output data streams from the DIR9001. We really just use its PLL and VCO.

By tying its PSCK0 and PSCK1 pins to ground, we set the system SCKO clock to 128 times the sample rate, typically 48kHz, giving a frequency of 6.144MHz. The biphase-coded S/PDIF data is clocked at this same rate so the SCKO rising edges coincide with each possible level transition in the S/PDIF data stream.

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The unit can accept either an S/PDIF (coax) or TOSLINK digital audio input, with a slide switch used to select between them. The delayed signal is then fed to a home-theatre amplifier or to a stereo DAC (digital-to-analog converter) to drive a conventional hifi audio amplifier.

As a result, the falling edges occur when the data is in a stable state (low or high) and with the micro set to sample the raw S/PDIF data on these edges, the resulting data is an exact replica of the incoming bits. To avoid extra complexity, we also use the clock recovered from the incoming

S/PDIF data stream to clock the out­going delayed data.

Having received the audio data, the micro feeds it into a static RAM buffer for a set period before it is retrieved and output. To delay the raw data stream by one second we would need 6.144MHz x 1s = 6.144Mbit of storage. But we’d rather use a 4Mbit (512KB) SRAM chip since these are cheaper than 8Mbit SRAMs and are available in easier-to-solder packages (and require one less address line).

Our solution is to decode the biphase mark coding (BMC) and store the decoded data in RAM. It can then be re-encoded after being read back and before transmission.

This more than doubles the amount of data that can be stored in the buffer; each 128-bit S/PDIF frame decodes to 56 bits of data (we discard the preambles and re-insert them later) for an increase in memory usage efficiency of 129%.

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Fig.2: the general audio buffering arrangement. S/PDIF serial data is received by the DCI peripheral and placed into one of two DMA buffers. These are then copied into one of four local RAM buffers (the data is aligned at the same time). The main program loop then decodes the S/PDIF data and copies it into an SRAM block which is later retrieved and re-encoded into one of four output buffers. These are then copied into the outgoing DMA buffers by an interrupt handler and converted into a serial stream again by the output section of the DCI module.

With this method, a 512KB SRAM fits over 1.5 seconds worth of data at the typical rate (6.144MHz). The encoding and decoding can be done with RAM table lookups and since the micro saves a lot of time storing and retrieving less data, overall this method is faster too.

The SRAM is used as a circular buffer – see Fig.2. Decoded data is constantly being written to it, starting at the lowest address and working its way upwards and then wrapping around once it reaches the top. Playback occurs from a different position in the buffer and proceeds in a similar manner. The difference between the recording and playback addresses determines the delay.

Since the number of frames and thus the number of bits to delay depends on both the delay time set and the incoming data rate, the difference between the addresses is computed based on the rate at which incoming buffers are being filled. When this rate changes, this is automatically re-calculated. The micro’s 8MHz clock (from an external crystal oscillator circuit) is used as the reference frequency, to calculate the absolute time between buffers.

The delay time is set by remote control and is stored in flash memory so that it doesn’t have to be reset each time. The delay can be temporarily cancelled or re-instated with a single button press on the remote control.

Specifications

Supported formats: Linear PCM up to 48kHz, Dolby Digital (AC-3), DTS and similar compressed formats

Input: S/PDIF coaxial or TOSLINK, selectable by rear-panel switch

Outputs: S/PDIF coaxial and TOSLINK (both available simultaneously)

Delay range: 20-1500ms in 10ms steps; set using a universal remote control

Power supply: 9-12V DC, 150mA plugpack

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